1. Field of the Invention
The present invention deals, in general, with semiconductor devices.
2. Description of the Related Art
With reference to the figures, and in particular with reference now to FIG. 1E, shown is semiconductor device storage capacitor structure 100. Those skilled in the art will recognize that semiconductor device storage capacitor structure 100 is often utilized as part of integrated circuit devices such as dynamic random access memory (DRAM) cells, such as those composed of a metal oxide semiconductor (MOS) transistor and a storage capacitor (not shown), or as part of microprocessors (not shown).
Conventional techniques used to form semiconductor device storage capacitor structure 100 require the use of several discrete production tools. "Production tool" is a term of art used to indicate a stand alone machine that performs a related series of operations upon a semiconductor wafer during semiconductor device manufacturing. Those skilled in the art will recognize that each production tool typically performs only a finite number of manufacturing steps.
FIG. 1A depicts a structure typically produced by the use of a first production tool. Illustrated in FIG. 1A, formed on a silicon.sup.1 substrate (not shown) via techniques well known in the art, are field oxide isolation region 104, gate insulating film (not shown), gate electrodes 106, and layer 101 of insulating material 102 covering gate electrodes 106. (.sup.1 Silicon is defined herein to mean at least In situ phosphorous doped polysilicon, phosphorous deposited polysilicon, non-doped polysilicon, and amorphous silicon: consequently, reference to silicon herein is intended to encompass at least the foregoing-listed types of silicon.).
FIG. 1B shows a structure resulting from the sequential use of a second, third, fourth, and fifth production tool to modify the structure of FIG. 1A. Depicted in FIG. 1B is a structure having layer 107 of photoresist film 109 deposited on layer 101 of insulating material 102. Illustrated is that contact hole 110 has been formed to extend through layer 107 of photoresist film 109 and layer 101 of insulating material 102. Photolithography masking (hereby referred to as masking) and Reactive Ion Etching (hereby referred to as Plasma Etching) techniques are used to form contact hole 110 in a manner well known to those within the art. Contact hole 110 can be used to form electrical contact with a memory cell as described below.
FIG. 1C illustrates a structure resulting from the sequential use of a sixth, seventh, eighth, ninth, and tenth production tool to modify the structure of FIG. 1B. Shown in FIG. 1C is that layer 107 of photoresist film 109 has been removed, layer 113 of silicon 114 has been formed on layer 101 of insulating material 102, and that desired-shape mask 116 formed from photoresist film 109. Chemical Vapor Deposition (hereby referred to as CVD) is typically used to form added layer 113 of silicon 114 in a manner well known to those in the art. Desired-shape mask 116 is formed on added layer 113 of silicon 114 via a process well known to those within the art.
FIG. 1D shows a structure resulting from the use of an eleventh and twelfth production tool to modify the structure shown in FIG. 1C. FIG. 1D depicts storage capacitor solid-cylinder electrodes 118 of silicon 114. Storage capacitor solid-cylinder electrodes 118 are formed on the silicon film via plasma etching in a manner well known to those within the art. Note that in forming solid-cylinder electrodes 118 of silicon 114, desired-shape mask 116 of photoresist material 109 has been removed.
FIG. 1E depicts a structure resulting from the use of a thirteenth, fourteenth, and fifteenth production tool to modify the structure shown in FIG. 1D. FIG. 1E illustrates capacitor structure 100 where an insulating film 120 formed on the entire surface of the current structure with a subsequent layer 121 of silicon 114 being formed on insulating film 120. The subsequently formed layer 121 of silicon 114 acts as an opposing electrode to the previously developed solid-cylinder capacitor electrode 118 thus completing capacitor structure 100.
While capacitor structure 100 has proved very useful, those skilled in the art will recognize that capacitor structure 100 does have several associated disadvantages. For example, in order to achieve a larger capacitance in storage capacitor structure 100, the surface area of at least one of the opposing electrodes must be increased. In conventional memory cell structures within an integrated circuit (a typical application of capacitor structure 100), an increase in surface area is achieved by an increase in height of solid-cylinder capacitor electrode 118 (e.g., height increase `h` as depicted in FIG. 1D). Those skilled in the art will appreciate that a primary reason electrode height is the parameter increased instead of electrode length and/or width is that space constraints in typical semiconductor devices make increases in electrode length and/or width impracticable. In addition, another disadvantage is increases in electrode height are limited by the fact that as electrode height is increased, attaining acceptable electrode profile through plasma etching becomes increasingly difficult, and the fact that increased electrode height results in severe topography.sup.2 for following layers and processes. Such severe topography results in problems for photolithography masking and plasma etching of future layers. (.sup.2 Topography in semiconductor terms can be defined as height difference between high and low spots on the wafer surface. It is desirable to keep height difference as small as possible. Severe topography is defined as a large height difference.)
In an effort to avoid the noted disadvantages associated with capacitor structure 100, a related-art attempt has been made to achieve increased surface area between opposing capacitor electrodes by avenues other than that of increasing a bottom electrode height of a solid-cylinder electrode 118 as was described above. The attempt has focused on changing the shape of a semiconductor device capacitor bottom electrode to that of hollow-cylinder capacitor structure 200 shown in FIG. 2F. Conventional techniques used to form semiconductor device hollow-cylinder capacitor structure 200 require use of several production tools.
FIG. 2A depicts a structure typically produced by the use of a first production tool. Depicted in FIG. 2A are two layers 202, 204 of oxide 205 formed with an intermediate layer 206 of silicon 114 using CVD techniques. Illustrated is that a mask 208 of photoresist film 109 is placed above layer 202 of oxide 205.
FIG. 2B shows a structure resulting from the use of a second production tool to modify the structure of FIG. 2A. Subsequent to the production of the structure shown in FIG. 2A, plasma etching techniques are used to obtain an layer 203 of oxide 205 having a desired shape as shown in FIG. 2B.
FIG. 2C shows a structure resulting from the use of a third production tool to modify the structure of FIG. 2B. Subsequent to the production of the structure shown in FIG. 2B, mask 208 of photoresist film 109 is removed leaving the structure 212 shown in FIG. 2C.
FIG. 2D shows a structure resulting from the use of a fourth production tool to modify the structure of FIG. 2C. Subsequent to the production of the structure shown in FIG. 2C, CVD techniques are used to form added layer 214 of silicon 114 on the structure 212 shown in FIG. 2C, resulting in the structure 216 shown in FIG. 2D.
FIG. 2E shows a structure resulting from the use of a fifth production tool to modify the structure of FIG. 2D. Subsequent to the production of structure 216 shown in FIG. 2D, structure 216 shown in FIG. 2D is exposed to plasma etching which anisotropically etches flat portions of layer 214 of silicon 114 away, leaving vertical structures 218 of silicon 114 unetched and resulting in structure 220 shown in FIG. 2E. This etching process is referred to herein as an `etch back` process.
FIG. 2F shows a structure resulting from the use of a sixth production tool to modify the structure of FIG. 2E. Subsequent to the production of the structure shown in FIG. 2E, structure 220 shown in FIG. 2E is exposed to further plasma etching techniques whereby an oxide portion existing between silicon vertical section 222 (see FIG. 2E) is removed. FIG. 2F depicts the result of the further plasma etching, which is a semiconductor hollow-cylinder capacitor electrode structure 200.
Not shown, but as will be understood in the art, is that yet a seventh production tool will be utilized to construct a capacitor (not shown) from hollow-cylinder capacitor electrode structure 200 by use of an insulating film and additional silicon layer in a manner substantially analogous to that described in relation to FIG. 1E.
While hollow-cylinder capacitor electrode structure 200 does present advantages over capacitor structure 100, it also has disadvantages. For example, while the conventional method (discussed and illustrated in relation to FIGS. 1A-1E) achieves a bottom electrode shape using one plasma etch step, the alternative method (discussed and illustrated in relation to FIGS. 1A-1E) requires several plasma etch steps and several CVD steps over and above the conventional method. These additional steps make the alternative method undesirable due to additional cost associated with the process steps. Thus, while from a physical structure standpoint a capacitor constructed with hollow-cylinder capacitor electrode structure 200 is more desirable because the structure allows more surface area AND thus a high storage capacitance using the hollow-cylinder capacitor can be achieved, from a complexity of manufacturing and cost of manufacturing standpoint a capacitor constructed with solid-cylinder capacitor electrode structure 118 is more desirable.
It is therefore apparent that a need exists in the prior art for a method which will give the capability of producing hollow-cylinder capacitor electrode structure 200 with a cost and/or complexity of manufacturing comparable to or less than that associated with producing solid-cylinder capacitor electrode structure 118.